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www.irf.com 1 05/23/11 pd - 96277b hexfet ? power mosfet description features IRF9204PBF v dss = -40v r ds(on) = 16m i d = -74a gds gate drain source to-220ab IRF9204PBF s d g d
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s d g absolute maximum ratings parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) a i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) i dm pulsed drain current p d @t c = 25c power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as (thermally limited) single pulse avalanche energy mj e as (tested ) single pulse avalanche energy tested value i ar avalanche current a e ar repetitive avalanche energy mj t j operating junction and t stg storage temperature range c soldering temperature, for 10 seconds mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r jc junction-to-case ??? 1.05 r cs case-to-sink, flat, greased surface 0.50 ??? c/w r ja junction-to-ambient ??? 62 502 270 see fig.17a, 17b, 14, 15 143 0.95 20 max. -74 -53 -300 -56 -55 to + 175 300 (1.6mm from case ) 10 lbf in (1.1n m)

2 www.irf.com repetitive rating; pulse width limited by max. junction temperature. (see fig. 11). limited by t jmax , starting t j = 25c, l = 0.399mh r g = 25 , i as = -37a, v gs =-10v. part not recommended for use above this value. pulse width 1.0ms; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . limited by t jmax , see fig.17a, 17b, 14, 15 for typical repetitive avalanche performance. this value determined from sample failure population. 100% tested to this value in production. this is only applied to to-220ab pakcage.

s d g s d g electrical characteristics @ t j = 25c (unless otherwise specified) parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage -40 ??? ??? v v (br)dss / t j breakdown voltage temp. coefficient ??? 0.03 ??? v/c r ds(on) static drain-to-source on-resistance ??? ??? 16 ??? ??? 23 v gs(th) gate threshold voltage -1.0 -2.0 -3.0 v gfs forward transconductance 29 ??? ??? s i dss drain-to-source leakage current ??? ??? -25 ??? ??? -250 i gss gate-to-source forward leakage ??? ??? -100 gate-to-source reverse leakage ??? ??? 100 q g total gate charge ??? 149 224 q gs gate-to-source charge ??? 27 ??? q gd gate-to-drain ("miller") charge ??? 31 ??? t d(on) turn-on delay time ??? 27 ??? t r rise time ??? 383 ??? t d(off) turn-off delay time ??? 139 ??? t f fall time ??? 153 ??? l d internal drain inductance between lead, 6mm (0.25in.) l s internal source inductance from package and center of die contact c iss input capacitance ??? 7676 ??? c oss output capacitance ??? 654 ??? c rss reverse transfer capacitance ??? 539 ??? c oss output capacitance ??? 1747 ??? c oss output capacitance ??? 598 ??? c oss eff. effective output capacitance ??? 797 ??? source-drain ratings and characteristics parameter min. typ. max. units i s continuous source current (body diode) a i sm pulsed source current (body diode) v sd diode forward voltage ??? ??? -1.3 v t rr reverse recovery time ??? 51 77 ns q rr reverse recovery charge ??? 377 566 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) v ds = -10v, i d = -37a i d = -37a v ds = -32v conditions v gs = -10v v gs = 0v v ds = -25v ? = 1.0khz v gs = -20v mosfet symbol showing the integral reverse v gs = 0v, v ds = -32v, ? = 1.0khz v gs = 0v, v ds = 0v to -32v p-n junction diode. t j = 25c, i s = -37a, v gs = 0v t j = 25c, i f = -37a, v dd = -20v di/dt = 100a/ s conditions v gs = 0v, i d = -250 a reference to 25c, i d = -1ma v gs = -10v, i d = -37a v gs = 0v, v ds = 1.0v, ? = 1.0khz v gs = -10v v dd = -20v i d = -37a r g = 7.5 m v gs = -4.5v, i d = -30a a na v ds = v gs , i d = -100 a v ds = -40v, v gs = 0v v ds = -40v, v gs = 0v, t j = 125c v gs = 20v nc ns nh 4.5 ??? ??? ??? ??? 7.5 pf ??? ??? ??? ??? -74 -300

www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. typical forward transconductance vs. drain current fig 5. typical source-drain diode forward voltage fig 6. normalized on-resistance vs. temperature 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = -25v 60 s pulse width 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 0 20406080100 i d ,drain-to-source current (a) 0 10 20 30 40 50 60 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = -5v 380 s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.6 0.8 1.0 1.2 1.4 1.6 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = -37a v gs = -10v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top -15v -10v -4.5v -4.0v -3.5v -3.0v -2.8v bottom -2.5v 60 s pulse width tj = 25c -2.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) -2.5v 60 s pulse width tj = 175c vgs top -15v -10v -4.5v -4.0v -3.5v -3.0v -2.8v bottom -2.5v

4 www.irf.com fig 8. typical gate charge vs. gate-to-source voltage fig 7. typical capacitance vs. drain-to-source voltage fig 9. maximum safe operating area fig 10. maximum drain current vs. case temperature fig 11. maximum effective transient thermal impedance, junction-to-case 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 khz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc 0 20 40 60 80 100 120 140 160 180 q g , total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = -32v v ds = -20v i d = -37a 0 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 1msec 10msec 100 sec dc limited by package 25 50 75 100 125 150 175 t c , case temperature (c) 0 10 20 30 40 50 60 70 80 i d , d r a i n c u r r e n t ( a ) limited by package

www.irf.com 5 fig 12. maximum avalanche energy vs. drain current fig 13. threshold voltage vs. temperature fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 17a, 17b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1.0 1.5 2.0 2.5 3.0 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 1.0a i d = 1.0ma i d = 250ua i d = 150ua id = 100ua 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = -37a 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top -9.66a -16.7a bottom -37a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse)

6 www.irf.com fig 17b. unclamped inductive waveforms fig 17a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 18a. gate charge test circuit fig 18b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 16.

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p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period
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v ds 90% 10% v gs t d(on) t r t d(off) t f ( ) 1 * % 0.1 % ! " + - fig 19a. switching time test circuit fig 19b. switching time waveforms d.u.t. v ds i d i g 3ma v gs .3 f 50k .2 f 12v current regulator same type as d.u.t. current sampling resistors + -

www.irf.com 7 data and specifications subject to change without notice. this product has been designed for the industrial market. qualification standards can be found on ir?s web site. ir world headquarters: 101n. sepulveda blvd, el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 05/2011

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, - int ernat ional part number rectifier lot code as s e mb l y logo ye ar 0 = 2000 dat e code we e k 19 line c lot code 1789 e xample: t his is an irf 1010 note: "p" in as s embly line pos ition i ndicates "l ead - f r ee" in the assembly line "c" as s e mbled on ww 19, 2000 note: for the most current drawing please refer to ir website at http://www.irf.com/package/ to-220ab packages are not recommended for surface mount application.

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